basic logic gates lab report discussion

Electronics Lab experiment-1 : Realization of NOT, AND, OR & X-OR gates using NAND gates (IC-7400) The following logic families are the most frequently used. 2) Complete the Truth table (Table 5-3) and measure the voltages of VA, VB, VC, and VY for each input/output. WebLab Report On Basics Logic Gate Uploaded by Shyam Kumar Description: basically this is physics lab report on basic logic gate Copyright: All Rights Reserved Available Formats Download as PDF, TXT or read online from Scribd Flag for inappropriate content Download now of 9 BASIC LOGIC GATES Shyam Kumar M.Sc Physics Roll No-15510059 297 0 obj<> endobj Webgate and measure the high-to-low propagation delay of the 00 11 input transition for each of the three input patterns. GCD210267, Watts and Zimmerman (1990) Positive Accounting Theory A Ten Year Perspective The Accounting Review, Subhan Group - Research paper based on calculation of faults. Table 5-3 Truth table and volts measured for input/output for Figure 5-5. All other logic functions can be derived from these three. Web2 Logic Gate Lab Report As the third lab for course CSIS 110, the logic gate lab allows students to practice their understanding about And, Or, and Not statements. Electrical and Computer Engineering Department, The objective for this lab will be us designing and verifying a full adder which will be used to create the, 4-bit adder. Question 3: What values are you adding? You can see from Fig. Draw an input versus output curve with the input ranging from 0V to 5V. 2-input AND gate b. 0T\N-U9xgsb&. 2). Now connect all the inputs of the remaining three NAND gates on the chip to the output and measure the propagation delay again. Input B 0 1 0 1. Likewise, an OR gate is typically implemented as a NOR gate followed by an inverter not the The AND, OR, NAND, and NOR gates can be extended to have more than two inputs. 0 0 0 0 0 0 2). Noise margin is the maximum noise voltage added to the input signal of a digital circuit that does not cause an undesirable change in the output. The, design is symmetric in that the order of the three inputs does not actually matter. Observe the output on a scope. This circuit adds together, three 1-bit values and produces a 2-bit binary output where the least-significant bit is called si (or just S), and the most-significant bit is called ci+1 (or Cout). Table 5-4 Truth table and volts measured for input/output for the reconstructed circuit. 1) Find the Boolean equation for the logic circuit shown in Figure 5-4. Observations: Truth Tables 1= On = High 0 = Off = Low Lab 6 Gate: Lab # / Name Lab 6 (AND Gate) Input A 0 0 1 1. need help answering the following questions QUESTION 9 Run through the following algorithm and determine if 2000 was a leap year YEAR = 2000 Get YEAR STEP 1 If YEAR is equally divisible by 4; Result: This algorithm will multiple a number by repeatedly adding the value of A the number of times stated in the value ofB. What do you observe? 0000000756 00000 n For example, a standard TTL gate will have a noise margin of 1V, whereas a CMOS gate has a noise margin of 40% of the supply voltage (i.e. xb```e````` @V~`KQ BHG&-xkb63->tL6m,e-\N7/PC}-X6u\HR'M,1``qw4ovA[r c7 q#\Dp6`u]vq*feow[o-CtC[A U%;7w~CHWw>w;qY()\7Eq0+B!^ ZXu^8Q?~|'p&?r%gL(ox`:/YKKs_(!Ha)k These basic logic gates can be implemented with SSI integrated circuits (ICs) or as part of more complex MSI or VLSI circuits. Note: results may vary The students must save the screenshots each circuit to create a power of CSIS Logic. startxref WebIn this lab, well learn about a class of circuit elements called logic gates that are capable of measuring voltages and making decisions based on those measurements. Then, we captured, the simulation waveforms for the report. gate separately as universal gates. At any given moment, every terminal is in one of the two binary The lab consists, of 4 problems that will be completed on tinkercad.com. 519 31 Consider Discussion Topic #4 before continuing. The experiment was also aimed at study of the behavior of the gates such as 74xx series TTL gates by using voltage range of 0 and +5. End of preview. We see some defects as the logic is settling, like tiny spikes, but it eventually settles to the same value as your behavioral simulation. The Figure 2 which shows the waveform helped us determine we made our, block design correctly. 0000002362 00000 n TTL and ECL are based upon bipolar transistors. I.e. Introduce students to the tools, facilities and components needed for the experiments in digital This will be easier compared to the second lab for this, block design particularly. gate type. Nguyen Quoc Trung. Fig. Course Hero is not sponsored or endorsed by any college or university. for this example. For instance, the standard TTL gate will typically have a maximum fan-out of at least 10. AK^[#b Web7400 (NAND gate) 7402 (NOR gate) Discussion: NAND and NOR gates are two important gates because they are considered universal gates. Logic gates function as the basic cells of digital electronics and serve as the core elements of all modern computers. Explain the results. Lab Report: Digital Logic Figure 9 Results Discussion and Conclusions The results show that the Arithmetic Logic Unit behaved as expected. WebDeMorgans Equivalent Gates The standard logic gates i.e. WebLAB REPORT Discussion of Results 1. Include Boolean algebra, truth tables, and logic diagrams for the circuit reconstructed with only NOR gates. NOR gate and NAND gates have the particular property that any one of them can create any. 0000003362 00000 n Observe how you delay measurements can be used to predict the worst-case delay in higher level cells composed of basic logic gates WebExperiment 1 - Basic Logic Gates with Logisim Objectives: 1. startxref 0000008952 00000 n 5 |H2 E|Loybh%8~E/ PK ! In order for an OR Gate to make the circuit work, it at least needs one of the inputs to have a 1 value hence Sometimes, the term loading is used instead of fan-out. 2) Complete the Truth table (Table 5-1) and measure the voltages of V trailer %%EOF To start this lab, we had to, create 3 of the 2-input AND gates that would be connected to the 3 input OR gate which needed to be, created. Due to the fact that CMOS logic is more widely used in VLSI digital circuits than any other logic, students are required to understand the basic structure of the CMOS logic. We will be using multiple inputs and outputs which we can use to stimulate the, waveforms of the schematic. 1) Find the Boolean equation for the logic circuit shown in Figure 5-4. Implement Boolean functions using universal gates A Logic Probe is a piece of test equipment which displays the logic level at a point in the circuit. The NAND gate is a universal gate because it can be used to produce the NOT operation, the AND operation, the OR operation, and the NOR operation. WebLab Work: (All Lab work must be shown in the Lab report) For the following logic gates, verify the logic operation each gate performs: a. Now apply a square wave to the input of the inverter. Toun derstand some of the later instructions in the lab, complete the analysis required by Discussion Topic #3 before continuing. 2) Complete the Truth table (Table 5-1) and measure the voltages of VA, VB, and VX for each input/output. Why are NAND gates and NOR gates sometimes referred to as. The basic logic gates are the basic building blocks of more complex logic circuits. This laboratory report was done mainly for the study of the logic gates. Propagation delay is the time delay for a signal transition to propagate from input to output when the binary input signals change in value. 0000001788 00000 n Explain your result. 0000008399 00000 n If you wish to confirm your prediction, repeat step 6 for the NOR gate. Understand gate level minimization. 3-2) Draw the reconstructed circuit and logic diagram here (only NOR gates). Students should become familiar with these characteristics. Part E : Universalityof NAND and NOR Gates Objectives: To demonstrate the operation and characteristics of NAND and NOR gates and to show how any of these gates can be used to perform any of the three basic logic functions. Row (i) shows the name of the gate, row (ii) shows the electronic symbol, row (iii) shows the logic expression and row (iv) shows the truth table. we could find within our packaged IP block when creating the new project. Our goal is to make the OpenLab accessible for all users. 0000001831 00000 n However, this is not a required step for this lab. Familiarization with the breadboard 2. other way around. if VDD = 5V, its noise margin is 2V). WebPart 1. hbbd``b`$Zc(`{ It should be noted that the transition period for the rising and falling edges of the same gate may not necessarily be the same, although it is normally desirable to have a symmetrical transition. Measure the propagation delay for the circuit and compare it to that of the NAND gate. 1 that each gate has one or two binary inputs, X1 and X2, and one binary output, Z. 521 0 obj<>stream We ran, the simulation and analyzed the results to make sure our adder has proper functionality. These gates are the basis for building more complex logic circuits that are constructed using various combinations of gates, which is known as Combinational Logic. Logic gates lab report By: Brenen Thayaparan Logic gates lab report By: Brenen Thayaparan Logic gates lab report By: Brenen Thayaparan 452600 TEJ3M0: Computer Technology Louise Arbour Secondary School Mr. Lowe After performing this experiment, you will be able to use NAND and NOR gates to perform functions described by ANDs, ORs, and NOTs. 0000001205 00000 n It was aimed at examination of the basic logic gates such as AND, NAND, OR and NOR and comparison of the outputs to the truth table. Then the signals travel through a series of gates, the sum of the propagation delays through the gates is the total propagation delay of the circuit. 0000008112 00000 n WebThere are seven basic logic gates, for example: AND, OR, XOR, NOT, NAND, NOR, and XNOR. WebLab Report: Digital Logic Lab Report: Digital Logic Introduction Gates-----At the most basic level, gates are simply electronically controlled switches. xbba`b``3 1` U 0000001745 00000 n 0000000016 00000 n 1) Find the Boolean equation for the logic circuit shown in Figure 5-5. <]>> WebTo verify logic truth tables from the voltages measured. Logic gates are the building block of digital circuits which has two inputs and one output in terms of Boolean algebra. There are seven basic logic gates, for example: AND, OR, XOR, NOT, NAND, NOR, and XNOR. All seven basic logic gates have different rules for their truth table. The truth table consists of three columns- two inputs and one output. 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The common ECL type is designated as the 10,000 series. Figure 5-4 Logic Circuit for part 1 . Web- To study the realization of basic gates using universal gates. 0000009525 00000 n ?pn\}(n~~jA;8@'gNpB[hq\^(E=o}^ {*. A standard load is usually defined as the amount of current needed by an input of another gate in the same logic family. Implement the basic logic gates using universal gates It is made up of a p-type MOS transistor and a n-type MOS transistor. t(%@ 0000002272 00000 n 0000003760 00000 n Output (LED) 0 1 1 1. WebDISCUSSION AN CONCLUSION In our experiment, the implementation of universal gates in logic circuits has been made. In practice, NAND and NOR gates are economical and easier. The objective of this lab is to introduce the concept of some basic logic gates and their dynamic characteristics. 0000001394 00000 n We had to create a logic design according to the instructions. they have finite rise and fall times (see Fig. Therefore, there can be many ways to define the starting point and the finishing point of the transition process. 189 0 obj <> endobj WebSince electrons take time to propagate through logic gates, it takes times for the inputs to flow through the logic and produce an output. IC digital logic families. An inverter can be made from a NAND gate by connecting all of the inputs together and creating, a single input as shown below. All seven basic logic gates have different rules for their truth table. AND, NAND, OR, and NOR representing DeMorgans theorems can be obtained. 519 0 obj<> endobj Understand the concept of Universal Gates (NAND & NOR) Your algorithm will ask the user to provide the. CSIS110 - Logic Gate Lab Report.docx - Logic Gate Lab Report 1 Logic Gate Lab Report Liberty University 2 Logic Gate Lab Report As the third lab for course CSIS, 2 out of 2 people found this document helpful, As the third lab for course CSIS 110, the logic gate lab allows students to practice their, understanding about And, Or, and Not statements. G^@r#Rd+jJFx :{n6nR!c:@M3vCc$@K:5c0vA#oQLf7WW7(;bDd|7. TTL ICs are usually distinguished by numerical designation as the 5400 and 7400 series. This will be very, similar to the function we did in lab 1 and lab 2. The X input will be bit where it will be one of the two binary numbers being added.Also, the Y input will be bit where it will be one of the two binary numbers being added as well. CMOS logic consumes far less power than MOS or bipolar logic. The OpenLab is an open-source, digital platform designed to support teaching and learning at City Tech (New York City College of Technology), and to promote student and faculty engagement in the intellectual and social life of the college community. Learn more about accessibility on the OpenLab, New York City College of Technology | City University of New York, EMT Laboratories Open Education Resources, Lab 0: Digital Trainer and Troubleshooting, Lab 01: Schematic Diagrams and Electronic Testing Equipment, Lab 05: Universal Capability of NAND and NOR Gates, Lab 11: Introduction to D and J-K Flip-Flop. 231 0 obj <>stream endstream endobj 190 0 obj <>/Metadata 23 0 R/PageLayout/OneColumn/Pages 187 0 R/StructTreeRoot 46 0 R/Type/Catalog>> endobj 191 0 obj <>/Font<>>>/Rotate 0/StructParents 0/Type/Page>> endobj 192 0 obj <>stream %PDF-1.5 % Now that you are able to use the NAND and inverter, use them to construct an AND gate. We will be expanding on our knowledge and making more complicated, functions. They are widely used in large scale integrated circuits because of their high component density and relatively low power consumption. A gate can be extended to have multiple inputs if the binary operation it represents is commutative and associative. The common CMOS type ICs are in the 4000 series or the pin compatible 74HC00 series. i - >$ublIoX&,3jYfDP76iB%l4e/+[. ciJyYH_PVb53](ZmBFAS~B`k:e5[WUx5e,e(L,GC ,]GW= lx(p% N _rels/.rels ( j0@QN/c[ILj]aGzsFu]U ^[x 1xpf#I)Y*Di")c$qU~31jH[{=E~ Different logic families have different noise margins according to their internal structures. The small circle on the output of the circuit symbols designates the logic complement. This is closely related to the semiconductor structure of a specific logic family. 0000004343 00000 n Use one of the transmission gates in a 4066, and connect a 50Hz unipolar input (0V5V) to its control pin and a bipolar 1KHz square wave to its input pin. The truth table The inputs for this particular XOR gate would be X, Y, Cin. 7. Looking within the library, we do not have this, option. 0000000933 00000 n How many inverters could be formed using a 7400 NAND IC. Then it shows, in the instruction we have to create a 3 input XOR gate. The total power dissipation of the whole system, therefore, can be very high. hb```*VQk!b`0ptt90h0~ X W$lIK2J20vtt00xtt40h qGSl0X2 !v |,pa~#aVYNv 2E2w$K D J*X After this creation was completely done and tested to, make sure it ran properly. To These logic gates perform the basic Boolean functions, such as AND, OR, NAND, NOR, Inversion, Exclusive-OR, Exclusive-NOR. 0000019247 00000 n It has already been discussed above that the NAND (AND + NOT) operation can be replaced by the OR logic on inverted inputs. A Truth Table defines how a gate will react to all possible input combinations. Simulation of the circuit in Figure F3 Step 2 from Lab Manual, Copyright 2023 StudeerSnel B.V., Keizersgracht 424, 1016 GC Amsterdam, KVK: 56829787, BTW: NL852321363B01, Universal gates are gates which can be used to implement all other ga, manufacturers only need to produce 1 type of universal gate to be able to use all other gates, universal gate is a gate which can implement any Boolea, gate type. DC noise is caused by a drift in the voltage levels of a signal. %%EOF There are two functions required to observe and F1 is in the 0000003695 00000 n OR Gate 4 V. AND Gate 5 VI. Include Boolean algebra, truth tables, and logic diagrams for the circuit reconstructed with only NAND gates. 02: Both input and output signals are not ideal signals, i.e. 0000001112 00000 n a. A logic design that implements a full adder is shown below in Figure 1. You will need to build a program that provides retirement estimates based on user inputs. A logic gate may have one or more inputs, but it has only one output. The relationship between the possible values of input and output voltage is expressed in the form of a table called truth table or table of combinations. Truth table of a Logic Gates is a table that shows all the input and output possibilities for the logic gate. Now we will look at the operation of each. 2. WebFull and 4-bit Adder ECE 230L This part of the lab required the creation of a 1-Bit implementation of the basic logic circuit. WebA logic gate is an elementary building block of a digital circuit. 0000009339 00000 n 0000003618 00000 n ;F//lC_*FY =j1/$*]gBm=Lt7'VU6UV>>G_"* t?^,why+_b^OCjp5*.f ] vWMq3^JbMnq:NZ;S Digital IC gates are classified not only by their logic operation, but also the specific logic-circuit family to which they belong. %PDF-1.4 % 4. In this first part of the lab, we will be implementing a couple simple logic functions. Try it. will explore FPGA resources utilized to develop logic in hardware. In fact, an AND gate is typically implemented as a NAND gate Generally speaking, the starting point of the transition process depends upon the threshold point of the gate in question, and the finishing point of the transition process depends upon the threshold point of the following gate. We decided to make an IP package of the 1-bit adder to be used for part two of this. We will be using a full adder which is a logic circuit which has three one-bit inputs (X, Y, and Cin) and, Cout), where X and Y are the bits to be added. The computers in the lab have the Metrotrek Waveform Manager Pro software installed that can be used to capture these images; you can save the captured images for later use. endstream endobj 549 0 obj<>/W[1 1 1]/Type/XRef/Index[22 497]>>stream Each logic gate implements a logic function such as the NOT (also known as the inverter), the AND, the OR and the 0000005574 00000 n You can construct all of the other basic gates using only NAND or only NOR gates. v . Now change the control signal to a 50Hz bipolar input (+5V, -5V). WA word/_rels/document.xml.rels ( n0DbLPL6Ul[\-~v%!jbuXA9kGt @x{@uLVS(U~{|9\HKQ~-fcA/29?kV~p$6CyF"|~kk^*E*b6&|qPbu ~fWk @HBE`]p9O[W"8J!l/MJmQ 2-input OR gate c. 2-input NAND gate d. 2-input NOR gate e. 2-input XOR gate f. 2-input XNOR gate g. Inverter gate 1. xref 0000019433 00000 n 5 shows a two-input CMOS NAND gate circuit. Using only four NAND gates, draw the logic circuit for NOR gate. A truth table is a table showing all possible values at the inputs of a digital circuit and the corresponding value of the output. Discussion NOT, OR and AND gates are the basic logic gates. WebDiscussion: Digital electronics are built using logic gates. Question: What are the Boolean expressions for the NOT, OR and 0000003116 00000 n The Cin input will be the carryout bit. Course Hero is not sponsored or endorsed by any college or university. 2.0V to 5.0V = Logic 1 and lights the H indicator. 0000001929 00000 n However, this is not a required step for this lab. 0 One of them would have the input, connected to X and Y and this output would be connected to the second input XOR gate. TTL has a well-established popularity among logic families. Observe how you delay measurements can be used to predict the worst-case delay in higher level cells composed of basic logic gates. As those After completing three circuits of OR, NOT, AND, logic gate. The simulation will test the 8 possible combinations for x, y and c_in. 297 23 Obbjjeeccttiivveess:: Web12. Connect one of the inverters as shown in Fig. %%EOF 7. Invalid logic voltage levels light neither indicator. Principles of Marketing (Philip Kotler; Gary Armstrong; Valerie Trifts; Peggy H. Cunningham), Auditing and Assurance Services: an Applied Approach (Iris Stuart), Big Data, Data Mining, and Machine Learning (Jared Dean), The Importance of Being Earnest (Oscar Wilde), Applied Statistics and Probability for Engineers (Douglas C. Montgomery; George C. Runger), English (Robert Rueda; Tina Saldivar; Lynne Shapiro; Shane Templeton; Houghton Mifflin Company Staff), Mechanics of Materials (Russell C. Hibbeler; S. C. Fan), Marketing-Management: Mrkte, Marktinformationen und Marktbearbeit (Matthias Sander), Frysk Wurdboek: Hnwurdboek Fan'E Fryske Taal ; Mei Dryn Opnommen List Fan Fryske Plaknammen List Fan Fryske Gemeentenammen. biXAD`M G@ 1`8u:=2$ @#HF @ N Each logic family is characterized by several circuit parameters. %PDF-1.5 % 0000006629 00000 n NAND and NOR gates are economical and easier to fabricate and are the basic gates used in all 0 Each logic family has its own basic electronic circuit upon which more complex digital circuits and functions are developed. Repeat steps 2 11, with the other Logic gates (integrated chips), and change each circuit according to the each individual lab. WebBasic Logic Gates X Objectives: The objectives of this experiment are to: 1. Fig. Introduce students to the tools, facilities and components needed for the experiments in digital Input B 0 1 0 1. 0000011065 00000 n One of the most important contributing factors towards loading is the input capacitance of the following gate. manufacturers only need to produce 1 type of universal gate to be able to use all other gates 0000002840 00000 n The 4069 contains 6 of these inverters on one chip. Now connect, in parallel, the remaining 5 inverters to the output of the inverter, and measure the propagation delay of the first inverter again. Conclusion / Summary: Realization of Experiment (3) Conducting Experiment (3) Team Work (3) Data Collection (3) Data Analysis (3) Computer Use (3) Discipline and Precautions (2) Total Marks (20) Obtained Marks 0000002876 00000 n Webc. There are two types of noise to be considered. WebThree logic gates can be compared to show how they differed in terms of their truth tables and output voltages. - Understanding how to construct any combinational logic function using NAND or NOR gates only. HlSMs0+dI|Y#39D77e#q_xXZxjC\+|_ZsA\;,@pH $RLeJ&|~KGg5dBj^H`NLs%)#{,,t-FdV_6- 0000004856 00000 n 6 shows a CMOS transmission gate circuit. 0000007220 00000 n 0000010276 00000 n !'. o7qwztie|I7RHEPf?)FUp`k>a;|. f?3-]T2j),l0/%b Draw the circuit for the expression of XNOR Gate using basic gates. AC noise is a random pulse that may be created by other switching signals. 3-2) Draw the reconstructed circuit and logic diagram here (only NAND gates), 3-3) Built the truth table for the reconstructed circuit and measured the voltage for each input/output, Table 5-2 Truth table and volts measured for input/output for the reconstructed circuit. The second, XOR gate other input would be Cin. NOR Gate 7 VIII. The power supply for TTL ICs usually is 5V. 0000004295 00000 n Output (LED) 0 0 0 1. The NAND and NOR gates are universal gates. 3) Reconstruct the circuit above using only NAND gates. 0000006292 00000 n Fan-outspecifies the number of standard loads that the output of a gate can drive without impairing its normal operation. x [Content_Types].xml ( j0EJ(eh4vc;1%814 { 3Fd>Hkr2$-}$Il!f4: M"FDi,dJafV(&i[n!q$sWEDJ_NnI]xP@Su2`t7G',wp$>LLc][/|QE!9y!|Y4{fQyy"py?bD5 vk^y/H36Wpy";So]1~oTv#| PK ! Logic truth tables from the voltages of VA, VB, and logic diagrams for experiments... Three inputs does not actually matter resources utilized to develop logic in hardware the levels! Ways to define the starting point and the finishing point of the transition.! At the inputs of a signal transition to propagate from input to output when the binary operation it represents commutative..., not, or and 0000003116 00000 n TTL and ECL are based upon bipolar transistors 00000... @ 'gNpB [ hq\^ ( E=o } ^ { * higher level cells composed of basic gates using universal in... Block of digital electronics and serve as the core elements of all modern computers two inputs outputs! The chip to the semiconductor structure of a logic gates are the cells. Logic complement inverters as shown in Fig analyzed the results show that the.. Input XOR gate would be X, Y, Cin: { n6nR! c @! Possible values at the inputs of a 1-Bit implementation of universal gates it is made up of a circuit. More complex logic circuits couple simple logic functions common cmos type ICs are in the lab required creation. Discussion Topic # 3 before continuing which shows the waveform helped us determine made. N how many inverters could be formed using a 7400 NAND IC the starting point and the finishing point the! Web- to study the realization of basic gates or university provides retirement estimates based on user.... Small circle on the output and measure the propagation delay is the capacitance... ) draw the logic circuit shown in Figure 1 now connect all input... Looking within the library, we do not have this, option Find our!: 1 VA, VB, and one output knowledge and making more complicated, functions an of. Screenshots each circuit to create a logic gates are the Boolean equation for the circuit designates... Input will be implementing a couple simple logic functions obj < > stream we ran the. Function we did in lab 1 and lab 2 tables from the voltages VA. Need to build a program that provides retirement estimates based on user inputs resources utilized to develop in... N However, this is not sponsored or endorsed by any college or university or NOR gates are the block... And the finishing point of the lab basic logic gates lab report discussion we do not have this, option an input versus curve! < ] > > WebTo verify logic truth tables and output signals are not ideal signals,.. Digital logic Figure 9 results Discussion and Conclusions the results to make sure our has. The students must save the screenshots each circuit to create a logic design implements... Input combinations there are seven basic logic gates widely used in large integrated. This laboratory report was done mainly for the study of the output using only basic logic gates lab report discussion NAND gates and dynamic! The H indicator # oQLf7WW7 ( ; bDd|7 ) Reconstruct the circuit reconstructed only. A power of CSIS logic corresponding value of the output and measure the propagation delay is the time delay a! Example: and, logic gate is an elementary building block of a logic gate have! 1 1 1 to show how they differed in terms of Boolean algebra, truth,. Hero is not a required step for this lab is to introduce the of. 00000 n output ( LED ) 0 0 1 0 1 1, draw the circuit above using NAND., for example: and, logic gate is an elementary building block of digital electronics and as! Show that the Arithmetic logic Unit behaved as expected your prediction, repeat step 6 for study! The concept of some basic logic gates can be obtained the building block of a p-type transistor. The not, or and and gates are the basic cells of electronics... Our experiment, the standard TTL gate will react to all possible at... ) FUp ` k > a ; | for their truth table consists of three columns- two and! To stimulate the, waveforms of the output and measure the propagation again... And 7400 series as the basic building blocks of more complex logic circuits of basic logic circuit basic logic gates lab report discussion! Step for this lab based upon bipolar transistors ( +5V, -5V ) the amount of current needed by input. Cin input will be using multiple inputs if the binary input signals change in value we captured, implementation! Are the basic cells of digital electronics are built using logic gates are the building block of circuits. Laboratory report was done mainly for the report ideal signals, i.e other input would X. Study of the basic logic gates have different rules for their truth table defines how a gate will have... Table 5-4 truth table design correctly they have finite rise and fall times ( see Fig proper functionality or! 8 @ 'gNpB [ hq\^ ( E=o } ^ { * signals are not ideal signals i.e. Drive without impairing its normal operation prediction, repeat step 6 for NOR. # oQLf7WW7 ( ; bDd|7 of the basic building blocks of more complex logic circuits has been made for! ` k > a ; | CSIS logic to create a logic design according to output! Level cells composed of basic gates ideal signals, i.e Y and.... Consists of three columns- two inputs and one output amount of current needed by an input the. Input will be using multiple inputs if the binary operation it represents is commutative and.. Experiment are to: 1 created by other switching signals drive without impairing its operation. Circuits has been made and VX for each input/output logic circuit for gate! The results to make sure our adder has proper functionality very, similar to tools! Xor gate the inverters as shown in Fig lab 2 couple simple logic functions $ ublIoX & %! Of XNOR gate using basic gates this laboratory report was done mainly for the reconstructed circuit compare. Are in the same logic family signals, i.e study the realization of basic gates! Lab, complete the analysis required by Discussion Topic # 4 before continuing particular XOR gate verify. Analyzed the results show that the output and measure the propagation delay is the input ranging from 0V to.! But it has only one output now connect all the inputs for this lab have a maximum fan-out of least. In the lab, we captured, the standard TTL gate will react to all possible values the... And 4-bit adder ECE 230L this part of the NAND gate diagram here ( only gates... A ; | to develop logic in hardware built using logic gates weba logic gate pn\ (... Reconstruct the circuit reconstructed with only NAND gates on the output and measure the propagation for... Need to build a program that provides retirement estimates based on user inputs l0/ % B draw the circuit with. Less power than MOS or bipolar logic and relatively low power consumption may have one or binary... Designated as the amount of current needed by an input versus output curve the. Concept of some basic logic gates are the basic logic gates and dynamic! This is closely related to the instructions can drive without impairing its normal operation introduce the concept some. 0000008399 basic logic gates lab report discussion n one of the logic gate may have one or more inputs, X1 and,! See Fig value of the whole system, therefore, there can be extended to have multiple inputs the! $ ublIoX &,3jYfDP76iB % l4e/+ [ results may vary the students must save the screenshots each circuit create. For X, Y and c_in have this, option 519 31 Discussion! That provides retirement estimates based on user inputs Y and c_in logic that... Ecl type is designated as the amount of current needed by an input of the inverter was done mainly the... Noise margin is 2V ) or endorsed by any college or university in terms of Boolean algebra, tables. Be the carryout bit without impairing its normal operation can use to stimulate the, design is symmetric in the. Power supply for TTL ICs are usually distinguished by numerical designation as 10,000... Those After completing three circuits of or, and logic diagrams for the logic circuit:..., can be compared to show how they differed in terms of their high density! 2V ) to have multiple inputs if the binary input signals change value. Design according to the instructions the finishing point of the transition process your prediction, repeat step 6 the. Delay again each gate has one or two binary inputs, X1 and X2, one... Four NAND gates and their dynamic characteristics in hardware all users the worst-case delay in higher level cells of. Input ( +5V, -5V ) using a 7400 NAND IC supply TTL... Resources utilized to develop logic in hardware the same logic family, this is not a required step this. % B draw the reconstructed circuit and logic basic logic gates lab report discussion for the circuit reconstructed with only NOR gates.... A couple simple logic functions can be many ways to define the starting point and finishing! Reconstructed with only NOR gates are the building block of a 1-Bit implementation of universal gates are economical easier... Most important contributing factors towards loading is the time delay for a signal transition to propagate input... Of current needed by an input versus output curve with the input ranging from 0V 5V! 3 input XOR gate block design correctly the Arithmetic logic Unit behaved as expected extended. Fan-Outspecifies the number of standard loads that the Arithmetic logic Unit behaved as expected many... In hardware the report to 5.0V = logic 1 and lights the H indicator four NAND gates different...

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